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Imec and Tokyo Electron to collaborate on STT-MRAM R&D
Monday, November 12, 2012 6:30
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Imec and Tokyo Electron (TEL) have decided to extend their current collaboration to include joint R&D on STT-MRAM, which will take place within imec’s research and development program on emerging memory technologies.
TEL installed a Tactras etch tool at imec’s 300mm clean room. This enables imec and TEL to jointly develop the patterning processes for high-density STT-MRAM technology. The Tactras is designed for in-situ cluster patterning of the Magnetic Tunnel Junction (MTJ) stack, which is key for advanced memory technology nodes.
2012-11-12 06:20:06
Source: http://www.mram-info.com/imec-and-tokyo-electron-collaborate-stt-mram-rd
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