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Toshiba developed the lowest power consumption STT-MRAM memory element, will accelerate R&D

Monday, December 10, 2012 18:11
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(Before It's News)

Toshiba has developed a prototype memory element for STT-MRAM that (according to Toshiba) achieves the world’s lowest power consumption yet reported. STT-MRAM based on this element has the potential to surpass the power consumption efficiency of SRAM as cache memory.

Toshibas perpendicular STT-MRAM cross section

Toshiba’s improved structure is based on perpendicular magnetization and takes element miniaturization to below 30nm. Introduction of this newly designed “normally-off” memory circuit with no passes for current to leak into cuts leak current to zero in both operation and standby without any specific power supply management. The company says it improved the speed of their previous design – while reducing the power consumption by 90%.

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